December 2013 Archive


Paging
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Paging

Most virtual memory systems use a technique called paging, which we will now explain. On any computer, programs reference a set of memory addresses. When a program implements an instruction like

Page Tables
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Page Tables

In a simple execution, the mapping of virtual addresses onto physical addresses can be summarized as follows: the virtual address is split into a virtual page number (high-order bits) and an offset (low-order bits). For instance, with a 16-bit address and a 4-KB page size, the

Speeding Up Paging
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Speeding Up Paging

As we have just studied the basics of virtual memory and paging, it is now time to go into more detail about possible implementations. In any paging system, two main issues must be faced:

Page Tables for Large Memories
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Page Tables for Large Memories

TLBs can be used to speed up virtual address to physical address translation over the original page-table-in-memory scheme. But that is not the only problem we have to deal with. Another problem is how to deal with very large virtual address spaces. Below we will discuss two ways

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